To be held November 16, 2015 in Austin, Texas, in conjunction with SC’15 and in collaboration with ACM SIGHPC
Hardware-software co-design involves the concurrent design of hardware and software components of complex computer systems, whereby application requirements influence architecture design and hardware constraints influence design of algorithms and software. High Performance Computing (HPC) is facing a daunting challenges as we move towards the exascale era, with the necessity of designing systems that run large-scale simulations with high performance while meeting cost and energy consumption constraints. The purpose of this workshop is to bring together researchers who are investigating the interrelationships between algorithms/applications, systems software, and hardware, and who are developing methodologies and tools for hardware-software co-design for HPC. We seek submissions that address various aspects of hardware-software co-design and that demonstrate collaboration between domain scientists, applied mathematicians, computer scientists, and hardware architects. Last year’s workshop was one of the best attended at SC’14, averaging over 80 attendees throughout the day, with attendees including academic, research lab, and industry researchers and government program managers in the hardware-software co-design area. This year’s workshop focuses especially on hardware-software co-design for advanced architectures, including systems with new low-power processor designs and new memory technologies.
Topics of interest to the workshop include, but are not limited, to the following:
Submitted papers must be no more than 8 pages in length and must be in IEEE Proceedings format. Use the templates available at http://www.ieee.org/conferences_events/conferences/publishing/templates.html. All submissions should be to the EasyChair submissions website at https://www.easychair.org/conferences/?conf=cohpc2015.
Abstract: The 64-bit ARMv8 platform has captured the attention of system designers across a number of computing domains, ranging from mobile and tablet computing to large-scale cloud and HPC systems. This is evidenced by the fact that ARM has sold over 50 licenses to the technology. Many in the HPC community are convinced that energy efficient ARM designs, and the ARMv8 platform in particular due to its improved double-precision and SIMD support over prior ARM designs, will figure prominently into the set of solutions that allow continued expansion in the computational capabilities of HPC systems and the scientific discoveries fueled by those capabilities. Dr. Carrington will present her work on the performance and energy-efficiency analysis of ARM processors for HPC workloads. The analysis includes comparison of an early ARMv8 HPC platform to current architectures including INTEL SandyBridge, Haswell, and ATOM.
Bio: Dr. Carrington is the Director of the Performance Modeling and Characterization (PMaC) lab at San Diego Supercomputer Center and the Vice President of Research for EP Analytics. Dr. Carrington is an expert in High Performance Computing with publications in HPC benchmarking, workload analysis, application performance analysis and optimization, analysis of accelerators (i.e. FPGAs and GPUs) for scientific workloads, tools in performance analysis (i.e. processor and network simulators), and energy-efficient computing. She has presented numerous invited talks and been a member of various panels and committees. She is the lead for the energy efficiency thrust area for the DOE SciDAC-3 Institute for Sustained Performance, Energy, and Resilience (SUPER).
The authors of papers accepted to the Co-HPC 2015 workshop will be invited to extend the manuscript for a special issue of Scientific Programming, guest-edited by the Co-HPC 2015 workshop chairs. The target submission deadline for the journal papers is December 25, 2015. See http://www.hindawi.com/journals/sp/si/184027/cfp/ for details..